Bowen Blog

Always achieving more.

GSoC19 Phase 3 Week 2

Weekly Report

Hi, this is my weekly report this week. Progress this week This week, I mainly did QA and fix bugs. I changed some names of the function in the cpp template. It will not affect the usage of the...

GSoC19 Phase 3 Week 1

Weekly Report

Hi, this is my weekly report this week. Progress this week I am constructing some converter blocks this week, which make it easir to interact with Verilog modules of different data widths. I bu...

GSoC19 Phase 2 Week 4

Weekly Report

Hi, this is my weekly report this week. Progress this week I am glad that I passed the second evaluation this week, I can not achieve this without the help of my mentor and community. I really a...

GSoC19 Phase 2 Week 3

Weekly Report

Hi, this is my weekly report this week. Progress this week I moved the verilog_axi_ii block to a new branch axi, you can find it here. With the help of Marcus, I add some extra code to make sur...

GSoC19 Phase 2 Week 2

Weekly Report

Hi, this is my weekly report this week. Progress this week I am keeping working on the verilog_axi_ii block this week. I successfully built and tested the block. There are still some unfinished...

GSoC19 Phase 2 Week 1

Weekly Report

Hi, this is my weekly report this week. Progress this week I created a new block named verilog_axi_ii. This block is a sync block with a simplified AXI4-Stream interface. You can find this new b...

GSoC19 Phase 1 Week 4

Weekly Report

Hi, This is my weekly report this week. Progress this week I planned to work on the parse function this week, but this week’s two major exams took me more time than I expected. I did not finish ...

Implementation of Verilog_data

Verilog_data class

This is a report about the Implementation of Verilog_data class. The Verilog_data class is the one of the most important classes in this project. Not only does it work only in block code, but it...

GSoC19 Phase 1 Week 3

Weekly Report

Hi, This is my weekly report this week. Progress this week I was working on my final exam this week, so I did not do much actual work. But I post a report about the implementation of the Verilog...

GSoC19 Phase 1 Week 2

Weekly Report

Hi, This is my weekly report this week. Progress this week I have completed and test the code of Shell_cmd and Shared_lib this week, and I construct most part of the code of Verilog_data but hav...