Hi, This is my weekly report this week.
Progress this week
I was working on my final exam this week, so I did not do much actual work. But I post a report about the implementation of the Verilog_data class, you can find it here.
Plan next week
I will work on the parse function next week, but I plan to move the function from Verilog_data to the block class.
Issue(s)
Though my final exam is not over yet, I will more time in the next week.
See you next week.
